Project
MIPS Processor
MIPS Processor Implementation
About the project
MIPS Processor
Digital Design
MIPS Processor is a 32-bit MIPS-like processor designed and simulated in VHDL with an FSM controller.
The processor supports R-type, I-type and J-type instructions, including arithmetic, logic, and memory operations.
Worked on
● Designed ALU supporting arithmetic, logic, shift and comparison operations.
● Implemented memory module RAM and memory mapped I/O ports.
● Implemented the FSM controller for fetch, decode and execute stages.
Built with
VHDL
ModelSim
Quartus
FPGA