MIPS PROCESSOR
MIPS Processor Implementation
Designed & Built by MIPS Processor team
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RTL and DE-10 Lite
Order Summary
MIPS Processor is a 32-bit MIPS-like processor designed and simulated in VHDL with an FSM controller.
The processor supports R-type, I-type and J-type instructions, including arithmetic, logic, and memory operations.
Fully working - 100% passes all tests
Items — What I Built
- Designed ALU supporting arithmetic, logic, shift and comparison operations.
- Implemented memory module RAM and memory mapped I/O ports.
- Implemented the FSM controller for fetch, decode and execute stages.
Built With
VHDL
ModelSim
Quartus
FPGA
DE-10 Lite
MIPS Processor — 0 0 2 — S K
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